Emerging Materials for TSV Devices
Growing demands for electronic devices with increased performance and functionality in smaller, lighter packages has driven the semiconductor industry to develop more advanced packaging technologies.
Of the different types of packaging technologies being considered, 3D vertical integration using Through Silicon Via (TSV) copper interconnect is one of the most advanced technologies in the semiconductor industry. Through-Silicon Via (TSV) is the latest in a progression of technologies for stacking silicon devices.
Emerging Materials for TSV Devices will:
- Review anticipated materials needs for potential future devices
- Discuss the relative challenges of competing TSV technologies
- Target markets for TSV materials
Table of Contents
1. Review TSV Process Options
- 2.5 and 3.0D
- Via First
- Via Middle
- Via Last
2. Review Activities of Leading End-Users and Developers
3. Review TSV Forecasts and Drivers
4. Materials Reviews
- Copper CMP/Barrier CMP
- Back grinding/Wafer thinning
- Via reveal by Si/Cu CMP
- Wet etching for via reveal
- Oxide deposition
- Oxide CMP to reveal via and planarization
- Wafer bonding
- Various types of bonding materials
- Temporary and permanent bonding
5. Materials Forecasts
6. Discussion of Leading Suppliers
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