SPCC 2017 Technical Program

SPCC 2017 Technical Program

Pre-Registration — Monday, March 27, 2017

10:00 AM – 5:00 PM: Post CMP Cleaning Conference

5:00 PM – 8:00 PM: Pre-registration and networking —Location: TBD

DAY 1 — Tuesday, March 28, 2017

7:30 – 9AM: Breakfast — Location—TBD

SESSION 1: Keynote/BEOL—Location—TBD

Session Chair: Joel Barnett

9:00 AM: Introductions, Day 1 Welcome, Conference Overview — Joel Barnett/Mark Thirsk

9:15 AM: KEYNOTEWafer Cleanliness: Challenges from an Increasingly Complex Fab Process – Ben Eynon, Assistant Director, Strategic Programs University of Texas at Austin, NASCENT Center

9:55 AM: INVITEDChemical Bonding Transformation Mapping to Optimize Low-k Dielectric Nanostructure Fabrication and Post-etch Residue Clean – Professor Oliver Chyan, Director, Interfacial Electrochemistry and Materials Research Lab, UNT

10:20 AM – 10:45 AM  BREAK —Location: TBD

10:45 AM: Wet clean transfer challenges in 22 nm ½ pitch and 16 nm ½ pitch structures – Els Kesters, imec

11:05 AM: High Temperature Water as a Clean and Etch of low-k Films – Rick Reidy, University of North Texas

11:25 AM: Contact cleaning opportunities on single wafer tool – Lucile Broussous, ST

11:45 AM: Removal of edge cluster defects by improving recipe and hardware for backside polysilicon wet etch process – Hong-Ying Zhai, GLOBALFOUNDRIES

12:05 PM – 1:30 PM  LUNCH—Location: TBD

SESSION 2: Contamination Control — Location-TBD

Session Chairs: TBD

1:30 PM: INVITED: The Future of Micro-Contamination Control in Chemical Delivery Systems for Advanced Lithography & Wet Etch and Clean Semiconductor Processes – Dr. Archita Sengupta, Intel Senior Technologist, Intel

1:55 PM: Effect of dilute hydrogen peroxide in ultrapure water—Yuichi Ogawa, Kurita

2:15 PM: Effect of Sulfuric Acid Manufacturing Process on Semiconductor Inline Defects – Dhiman Bhattacharyya, GLOBALFOUNDRIES

2:35 PM: Blisters formation mechanism during High Dose Implant Stripping – Marion Croisy, ST

2:55 PM: Gas Purge or Wet Cleaning? Decontamination Solutions to control AMCs in FOUPs – Paola González-Aguirre, Entegris

3:15 PM INVITED: Non-uniform contamination results in sub-ppm fail rates: analytical challenges– Dr. Martin Knotter, Senior Principal Scientist, NxP

3:40 PM – 4:00 PM: BREAK—Location: TBD

Session 3: Panel Discussion – Addressing Contamination Control — Location: TBD

Session Chairs: TBD

4:10 PM: INVITED: Electron beam generated plasmas: Ultra cold sources for low damage, atomic layer processing — Scott Walton, Naval Research Lab

4:45 PM: Selectivity in Atomic Layer Etching Using Sequential, Self-Limiting Thermal Reactions — Steve George, Univ. of CO

5:15 PM: Environmental friendly Fluorine mixture cleaning process to replace C2F6, CF4 and NF3 as cleaning gas — Marcello Riva, Solvay

5:35 PM: Wrap Up/Additional Questions/Adjourn Organizers

5:40 PM: Day 1 End

6:00 PM: Networking Reception, Poster Session — Location: TBD

DAY 2 — Wednesday, March 29, 2017

7:30 —9 AM: Breakfast — Location: TBD

Session 4: Advanced Surface Prep for FEOL — Location: TBD

Session Chairs: TBD

8:30 AM: Introductions, Day 2 Welcome

8:40 AM:INVITED:Nitride Device Surface Processes: A Review of Surface Science for Power and RF Technologies with Nitrides – H. Rusty Harris, Associate Professor of Electrical and Computer Engineering, Texas A&M University

9:05 AM: Si1-xGex (100) (x=0.25) MISCaps with Aqueous Ammonium Sulfide Passivation – Lauren Peckler, U of Arizona

9:25 AM: Surface Preparation and Wet Cleaning for Germanium Surface – Hajime Shirakawa, Screen

9:45 AM Wet and Siconi cleaning sequences for SiGe pMOS channel – Pierre-Edouard Ranal, CEA-Leti

10:05 AM – 10:30 AM BREAK — Location: TBD


10:30 AM: A Wet Clean Solution to Reduce Unwanted eSiGe Growth Defect in FinFET – Jian Li, GLOBALFOUNDRIES

10:50 AM: Wet etching of TiN in 1-D and 2-D confined nano-spaces of FinFET transistors – Guy Vereecke, imec

11:10 AM: New Wet Clean Process for Selective Nitride Film Removal with Exposed Oxide, low k and eSiGe, – Akshey Sehgal, GLOBALFOUNDRIES

11:30 AM – 12:45 PM LUNCH — Location: TBD

SESSION 5: Etching

Session Chairs: TBD

12:45 PM: INVITED: Shifting Global Economic Forces Shaping the Semiconductor Outlook Duncan Meldrum Ph.D., Chief Economist, Hilltop Economics LLC

1:10 PM: Thermal SiO2 Atomic Layer Etching by a “Conversion-Etch” Mechanism Using Sequential Exposures of HF and Al(CH3)3 – Steven George, University of Colorado

1:30 PM: Effect of Additives in Diluted HF Solutions on Removal of Metal Contaminants and Particles on Silicon Wafer  – Jin-Goo Park, Hanyang University

1:50 PM – 2:05 BREAK  — Location: TBD

Session 6: Post CMP Cleaning  — Location: TBD

Session Chairs: TBD

2:05 PM:  INVITED: Post CMP in-situ cleaning for 14/7nm transistor scaling: a crucial process for yield enhancement at advanced node device fabrication  – Dr. TaeHoon Lee, FEOL CMP Technical lead of Advanced Module Engineering Team, GLOBALFOUNDRIES

2:30 PM:   High Performance Ceria Post-CMP Cleaning Formulations for STI Dielectric Substrates   – Daniela White, Entegris

2:50 PM: Mechanistic and Electrochemical Aspects of Copper and Cobalt Post CMP Cleaners for 5-7 nm Nodes – Mike White, Entegris

3:10 PM: CMP Stack-Trek   – Viorel Balan, CEA-Leti

3:30 PM: Wrap Up/Additional Questions/Adjourn Organizers

3:40 PM:   Day 2 End


  • Chemical/Mechanical Balance Management through Pad Microstructure in CMP – Ratanak Yim, CEA-Leti
  • Process Model Identification for Optimizing Particle-to-Part Selectivity during Ultrasonic Parts Cleaning – Osama Khalil, Quantum Clean
  • Advantages of using RGA as part of Atomically Clean Surface (ACS™) for Sub-10nm Parts Cleaning Process – Matthew House, Quantum Clean
  • Sulfate ion removal by combined UV and bake process – Fei Xu, Changzhou Ruize Micro
  • Particle Clean-Up of Various Filter Media in WEC Chemistry via 20 nm Particle Counting – Patrick Connor, Pall
  • Effective Point of use Filtration of Ultrapure Water for Critical Tools and Processes – Glen Sundstrom, Evoqua Water Technologies
  • Continuous Monitoring of Particles at 20 nm in Critical Semiconductor Process Chemicals – Dan Rodier, PMS
  • Implementing Chemical Cost Saving in 14 nm High Volume Manufacturing Line – Tejasvi Sadasivuni, GLOBALFOUNDRIES
  • Improved Missing Pattern Defects using Megasonic for Hard Mask clean at 14 nm and Beyond – Sangita Kumari, GLOBALFOUNDRIES
  • Dummy Poly Gate Etch Residue Removal – Wen Dar Liu, Versum
  • BEOL Post-etch clean robustness improvement with ultra-diluted HF for 28nm node – Lucile Broussous, ST
  • Aluminum Cleaning on Single wafer tool : a case study with diluted HF – Lucile Broussous, ST
  • Indium Bump Liftoff Challenges – Scott Tice, MEI

For questions about the SPCC technical program, please contact Joel Barnett at 512-424-1631 or joel.barnett@us.tel.com.